Senior Field Application Engineer - DFT

Job Description

Experience

School Degree

Description

This is your role

  • Youll be responsible for Field Application Engineering (FAE) activities in Design For Test solutions of Mentor Graphics
  • Your primary responsibility will be to secure technical design wins for Mentor product and service offerings.
  • Specifically, you will be responsible for technical wins with the industry leading Tessent family of products.
  • You will be responsible for delivering Application Engineer duties starting with identifying customer needs, then deliver product presentations, demonstrations, support evaluations, competitive benchmarking, deliver workshops, and occasionally training.
  • We are looking for a results oriented and accountable person that thrives in an international environment.
  • It s important that you are self-propelled and enjoy taking on new challenges and learning new tools and methodologies as demands are constantly changing.
  • Engage as a trusted advisor with customers at engineer and lower level management to find ways to solve their design challenges with Mentor tools.
  • Work with design houses utilizing varying design styles and methodologies to craft the most effective technical solutions.
  • Collaborate with Account Teams in the development of sales strategies and tactical plans to grow business at their accounts. Connect with Mentor product division to influence product development in a favorable direction for our customers.
  • Participate in sales activities and marketing such as trade shows, workshops, seminars, Web-casts

We are not looking for superheroes, just super minds

  • You re a Graduate / Post Graduate (Bachelors/Masters) in Electronics/Electrical Engineering with equal to or more than 5 years of experience in VLSI domain.
  • You have served in Applications, Design or Product Engineering roles in Individual or leadership capacity.
  • You have In-depth understanding of Design for Test (DFT) architecture & structures including but not limited to scan based test, Compression, ATPG, IJTAG, Memory BIST and Boundary Scan among others.
  • You possess deep knowledge of RTL, Synthesis, STA with proven Industry track record in the area of VLSI Testing and design for testability.
  • Prior experience with Mentor s Tessent family of DFT products will give you an edge.
  • You have sound communication and problem solving skills, program management skills and hands-on experience with latest DFT technology.
  • You are a Self-starter with ability to operate independently & bring-in collective experience within Mentor to develop solutions to complex problems.
  • Proficiency in scripting languages (like Tcl) to build automated flows and design environments will be viewed as an advantage.
  • Working Operating Systems knowledge: Linux/Sun Solaris.


Education:
UG: Any Graduate - Any Specialization
PG: Any Postgraduate - Any Specialization
 
 
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